BEGIN:VCALENDAR VERSION:2.0 PRODID:Linklings LLC BEGIN:VTIMEZONE TZID:Australia/Melbourne X-LIC-LOCATION:Australia/Melbourne BEGIN:DAYLIGHT TZOFFSETFROM:+1000 TZOFFSETTO:+1100 TZNAME:AEDT DTSTART:19721003T020000 RRULE:FREQ=YEARLY;BYMONTH=4;BYDAY=1SU END:DAYLIGHT BEGIN:STANDARD DTSTART:19721003T020000 TZOFFSETFROM:+1100 TZOFFSETTO:+1000 TZNAME:AEST RRULE:FREQ=YEARLY;BYMONTH=10;BYDAY=1SU END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20240214T070241Z LOCATION:Darling Harbour Theatre\, Level 2 (Convention Centre) DTSTART;TZID=Australia/Melbourne:20231212T093000 DTEND;TZID=Australia/Melbourne:20231212T124500 UID:siggraphasia_SIGGRAPH Asia 2023_sess209_papers_438@linklings.com SUMMARY:Locally-Adaptive Level-of-Detail for Hardware-Accelerated Ray Trac ing DESCRIPTION:Technical Papers\n\nJacob Haydel (University of Utah); Cem Yuk sel (University of Utah, Roblox); and Larry Seiler (Independent)\n\nWe int roduce an adaptive level-of-detail technique for ray tracing triangle mesh es that aims to reduce the memory bandwidth used during ray traversal, whi ch can be the bottleneck for rendering time with large scenes and the prim ary consumer of energy. We propose a specific data structure for hierarchi cally representing triangle meshes, allowing localized decisions for the d esired mesh resolution per ray. Starting with the lowest-resolution triang le mesh level, higher-resolution levels are generated by tessellating each triangle into four via splitting its edges with arbitrarily-placed vertic es. We fit the resulting mesh hierarchy into a specialized acceleration st ructure to perform on-the-fly tessellation level selection during ray trav ersal. Our structure reduces both storage cost and data movement during re ndering, which are the main consumers of energy. It also allows continuous transitions between detail levels, while locally adjusting the mesh resol ution per ray and preserving watertightness. We present how this structure can be used with both primary and secondary rays for reflections and shad ows, which can intersect with different tessellation levels, providing con sistent results. We also propose specific hardware units to cover the cost of additional compute needed for level-of-detail operations. We evaluate our method using a cycle-accurate simulation of a custom ray tracing hardw are architecture. Our results show that, as compared to traditional boundi ng volume hierarchies, our method can provide more than an order of magnit ude reduction in energy use and render time, given sufficient computationa l resources.\n\nRegistration Category: Full Access, Enhanced Access, Trade Exhibitor, Experience Hall Exhibitor URL:https://asia.siggraph.org/2023/full-program?id=papers_438&sess=sess209 END:VEVENT END:VCALENDAR